ECC1STSEN

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Interpret as ECC1STSEN

E1STSEN=0

ECC 1-Bit Error Information Update Enable Register

E1STSEN	ECC 1-Bit Error Information Update Enable 0 (0): Disables updating of the 1-bit ECC error information. 1 (1): Enables updating of the 1-bit ECC error information.
Reserved	These bits are read as 0000000. The write value should be 0000000.

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